HWWRBUF=0, HWRSTCNT=0, HWSOC=0, SWINVC=0, CNTINC=0, SWOC=0, HWTRIGMODE=0, SWRSTCNT=0, HWOM=0, INVC=0, HWINVC=0, SWOM=0, SWSOC=0, SWWRBUF=0, SYNCMODE=0
Synchronization Configuration
| HWTRIGMODE | Hardware Trigger Mode 0 (0): FTM clears the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2. 1 (1): FTM does not clear the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2. |
| RESERVED | no description available |
| CNTINC | CNTIN Register Synchronization 0 (0): CNTIN register is updated with its buffer value at all rising edges of system clock. 1 (1): CNTIN register is updated with its buffer value by the PWM synchronization. |
| RESERVED | no description available |
| INVC | INVCTRL Register Synchronization 0 (0): INVCTRL register is updated with its buffer value at all rising edges of system clock. 1 (1): INVCTRL register is updated with its buffer value by the PWM synchronization. |
| SWOC | SWOCTRL Register Synchronization 0 (0): SWOCTRL register is updated with its buffer value at all rising edges of system clock. 1 (1): SWOCTRL register is updated with its buffer value by the PWM synchronization. |
| RESERVED | no description available |
| SYNCMODE | Synchronization Mode 0 (0): Legacy PWM synchronization is selected. 1 (1): Enhanced PWM synchronization is selected. |
| SWRSTCNT | no description available 0 (0): The software trigger does not activate the FTM counter synchronization. 1 (1): The software trigger activates the FTM counter synchronization. |
| SWWRBUF | no description available 0 (0): The software trigger does not activate MOD, CNTIN, and CV registers synchronization. 1 (1): The software trigger activates MOD, CNTIN, and CV registers synchronization. |
| SWOM | no description available 0 (0): The software trigger does not activate the OUTMASK register synchronization. 1 (1): The software trigger activates the OUTMASK register synchronization. |
| SWINVC | no description available 0 (0): The software trigger does not activate the INVCTRL register synchronization. 1 (1): The software trigger activates the INVCTRL register synchronization. |
| SWSOC | no description available 0 (0): The software trigger does not activate the SWOCTRL register synchronization. 1 (1): The software trigger activates the SWOCTRL register synchronization. |
| RESERVED | no description available |
| HWRSTCNT | no description available 0 (0): A hardware trigger does not activate the FTM counter synchronization. 1 (1): A hardware trigger activates the FTM counter synchronization. |
| HWWRBUF | no description available 0 (0): A hardware trigger does not activate MOD, CNTIN, and CV registers synchronization. 1 (1): A hardware trigger activates MOD, CNTIN, and CV registers synchronization. |
| HWOM | no description available 0 (0): A hardware trigger does not activate the OUTMASK register synchronization. 1 (1): A hardware trigger activates the OUTMASK register synchronization. |
| HWINVC | no description available 0 (0): A hardware trigger does not activate the INVCTRL register synchronization. 1 (1): A hardware trigger activates the INVCTRL register synchronization. |
| HWSOC | no description available 0 (0): A hardware trigger does not activate the SWOCTRL register synchronization. 1 (1): A hardware trigger activates the SWOCTRL register synchronization. |
| RESERVED | no description available |